the terminal count of a modulus-13 binary counter is

• A) 1100
• B) 1101
• C) 0000
• D) 1111

The ________ allows both its AND Gate array and the OR gate array to be programmed independently.

• A) PAL
• B) PLA
• C) EPROM
• D) GAL

PALs tend to execute ________ logic.

• A) SPD
• B) SOP
• C) SAP
• D) SAC

A __________ output can change from one state to the other by applying appropriate inputs.

• A) flip flop
• B) counter
• C) latch
• D) system

In Complex mode of GAL16V8, OLMCs can be configured in _________ ways.

• A) two
• B) four
• C) three
• D) five

In mealy machine the output depends on

• A) the inputs
• B) None of the above
• C) current state and the inputs
• D) the current state

According to Moore circuit, the output of synchronous sequential circuit depend/s on ______ of flip flop.

• A) Previous State
• B) Next State
• C) Present State
• D) External Inputs

____________ Counters as the name indicates are not triggered simultaneously

• A) Positive-Edge triggered
• B) Synchronous
• C) Negative-Edge triggered
• D) Asynchronous

In GAL16V8, each product term is implemented using a 32-bit input ___________ gate.

• A) NAND
• B) AND
• C) XOR
• D) OR

State of flip-flop can be switched by changing its_________.

• A) Momentary Signal
• B) Input Signal
• C) Output Signal
• D) Contemporary Signal

The operation of J-K flip-flop is similar to that of the SR flip-flop except that the J-K flip-flop ___________

• A) It does not show transition on change in pulse
• B) Sets to clear when both J = 0 and K = 0
• C) It does not accept asynchronous inputs
• D) Doesn’t have an invalid state

___________ is one of the examples of synchronous inputs.

• A) J-K input
• B) Clear Input (CLR)
• C) Preset input (PRE)
• D) EN input

A synchronous decade counter will have _______ flip-flops

• A) 10
• B) 7
• C) 4
• D) 3

A modulus-14 counter has fourteen states requiring_____________

• A) 4 Registers
• B) 14 Flip Flops
• C) 4 Flip Flops
• D) 14 Registers

Design of state diagram is one of many steps used to design

• A) any counter
• B) an UP/DOWN counter
• C) a truncated counter
• D) a clock

The combinational digital circuits have ___________ storage element; therefore combinational circuits handle only instantaneous inputs.

• A) no
• B) one
• C) two
• D) three

PLDs have In-System Programming (ISP) capability that allows the _________ to be programmed after they have been installed on a circuit board.

• A) PLAs
• B) PLDs
• C) EPROM
• D) PALs

The Synchronous counters are also known as Ripple Counters:

• A) False
• B) True
• C)
• D)

The glitches due to "Race Condition" can be avoided by using a ___________

• A) Gated flip-flops
• B) Negative-Edge triggered flip-flops
• C) Pulse triggered flip-flops
• D) Positive-Edge triggered flip-flops

________ come in different configurations they are identified by unique number

• A) PALs
• B) EPROM
• C) PLAs
• D) GAL