A latch is a temporary storage device that has _________ stable states.

• A) two
• B) four
• C) five
• D) three

_________ have Buffers at the inputs which produce the
actual variable and its complement.

• A) GAL
• B) PLA
• C) PAL
• D) EPROM

A decade counter can be implemented by truncating the counting sequence of a MOD-20 counter.

• A) False
• B) True
• C)
• D)

The n flip-flops store _____ states.

• A) 0
• B) 1
• C) 2^(n+1)
• D) 2^n

The _____________ input overrides the ________ input

• A) Asynchronous, synchronous
• B) Synchronous, asynchronous
• C) Clear input (CLR), Preset input (PRE)
• D) Preset input (PRE), Clear input (CLR)

A stage in the shift register consists of

• A) a latch
• B) a byte of storage
• C) a flip flop
• D) four bits of storage

A _________ can not operate without a memory element.

• A) counter
• B) unit
• C) clock
• D) cell

A one-shot mono-stable device contains _________

• A) NAND gate, Resistor, Capacitor and NOT Gate
• B) XNOR gate, Resistor, Capacitor and NOT Gate
• C) AND gate, Resistor, Capacitor and NOT Gate
• D) NOR gate, Resistor, Capacitor and NOT Gate

A multiplexer with a register circuit converts

• A) Parallel data to parallel
• B) Parallel data to serial
• C) Serial data to parallel
• D) Serial data to serial

In NAND based S-R latch, output of each __________ gate is connected to the input of the other ____________ gate.

• A) NOR,NAND
• B) NAND,NAND
• C) NOR,NOR
• D) NAND,NOR

If the S and R inputs of the gated S-R latch are connected together using a ______ gate then there is only a single input to the latch. The input is represented by D instead of S or R (A gated D-Latch)

• A) OR
• B) AND
• C) XOR
• D) NOT

The latch is said to be in logic _________ state when
Q=1 and Q'=0 and it is in the logic low state when Q=0 and Q'=1.

• A) constant
• B) high
• C) zero
• D) low

System having memory elements are called______ circuits.

• A) Sequential
• B) Quadrantal
• C) Simplex
• D) Combinational

The low to high or high to low transition of the clock is considered to be a(n) ________

• A) State
• B) Trigger
• C) Edge
• D) One-shot

The minimum time for which the input signal has to be maintained at the input of flip-flop is called ______ of the flip-flop.

• A) Pulse Interval time
• B) Hold time
• C) Pulse Stability time (PST)
• D) Set-up time

The GAL22V10 device is available as low-voltage
__________ version.

• A) 2.0v
• B) 1.5v
• C) 3.0v
• D) 3.3v

When the _____ Hz sampling interval is selected, the signal at the output of the J-K flip-flop has a time period of _____ seconds.

• A) 1,1
• B) 1,2
• C) 0,2
• D) 2,5

A mono-stable device only has a single stable state

• A) False
• B) True
• C)
• D)

In moore machine the output depends on

• A) the current state and inputs
• B) only inputs
• C) the current state and the output of previous flip flop
• D) the current state

A divide-by-10 Johnson counter requires

• A) five flip-flops
• B) twelve flip-flops
• C) ten flip-flops
• D) four flip-flops